Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank

794 68

Git Repositories

chisel3

Started

2015-04-27 3,631 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Past 30 days 114 commits #497 9 contributors #831
Past 90 days 371 commits #512 17 contributors #891
Past 365 days 766 commits #876 40 contributors #1,000
Past 1095 days 1,785 commits #1,193 80 contributors #1,244
All time 3,720 commits 152 contributors

Contributing Individuals

Commits past X days
30 90 365 1095 All
87 Mads Rumle Nordstrøm 0 0 0 1 1
87 Tushar Sondhi 0 0 0 1 1
87 Shahzaib Kashif 0 0 0 1 1
87 qimingchu 0 0 0 1 1
87 Nandor Licker 0 0 0 1 1
87 Michiel Van Beirendonck 0 0 0 1 1
107 Hasan Genc 0 0 0 0 2
107 Oyvind Harboe 0 0 0 0 2
107 Zhehao Mao 0 0 0 0 2
107 John Ingalls 0 0 0 0 2
107 John's Brew 0 0 0 0 2
107 Hasan Genc 0 0 0 0 2
107 Brendan Sweeney 0 0 0 0 2
107 SoyaOhnishi 0 0 0 0 2
107 Jerry Zhao 0 0 0 0 2
107 Stevo 0 0 0 0 2
107 Tom Alcorn 0 0 0 0 2
118 Anders Pitman 0 0 0 0 1
118 Felix Yan 0 0 0 0 1
118 Carlos Eduardo 0 0 0 0 1
Showing 101 to 120 of 152 results Previous Next
Contributing Companies

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