Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,794 commits
153 contributors

Rank

930 88

Git Repositories

Started

2015-04-27 3,694 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 20 commits #1,315 8 contributors #874
Past 90 days 179 commits #819 19 contributors #781
Past 365 days 766 commits #847 39 contributors #993
Past 1095 days 1,808 commits #1,145 79 contributors #1,242
All time 3,794 commits 153 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
85 qimingchu
0 0 0 1 1
85 Nandor Licker
0 0 0 1 1
85 Michiel Van Beirendonck
0 0 0 1 1
85 Amelia Dobis
0 0 0 1 1
105 Hasan Genc
0 0 0 0 2
105 Oyvind Harboe
0 0 0 0 2
105 Zhehao Mao
0 0 0 0 2
105 John Ingalls
0 0 0 0 2
105 John's Brew
0 0 0 0 2
105 Lucheng Zhang
0 0 0 0 2
105 Liu Xiaoyi
0 0 0 0 2
105 Hasan Genc
0 0 0 0 2
105 Brendan Sweeney
0 0 0 0 2
105 SoyaOhnishi
0 0 0 0 2
105 Jerry Zhao
0 0 0 0 2
105 Stevo
0 0 0 0 2
105 Tom Alcorn
0 0 0 0 2
118 Anders Pitman
0 0 0 0 1
118 Felix Yan
0 0 0 0 1
118 Carlos Eduardo
0 0 0 0 1
Showing 101 to 120 of 153 results
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Contributing Companies

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