Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,794 commits
153 contributors

Rank

932 90

Git Repositories

Started

2015-04-27 3,694 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 20 commits #1,318 8 contributors #876
Past 90 days 179 commits #819 19 contributors #781
Past 365 days 766 commits #847 39 contributors #993
Past 1095 days 1,808 commits #1,145 79 contributors #1,242
All time 3,794 commits 153 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
77 Colin Schmidt
0 0 0 0 4
77 Olushola Ogunkelu
0 0 0 0 4
77 anniej-sifive
0 0 0 0 4
77 Vladimir Milovanović
0 0 0 1 2
85 Ashe Connor
0 0 0 1 1
85 Guillaume Martres
0 0 0 1 1
85 Andrew Young
0 0 0 1 1
85 Nandor Licker
0 0 0 1 1
85 Michael Etzkorn 叶明凯
0 0 0 1 1
85 Josh Bassett
0 0 0 0 3
85 Angie Wang
0 0 0 0 3
85 Marco Origlia
0 0 0 1 1
85 Huang Rui
0 0 0 1 1
85 jensengrey
0 0 0 1 1
85 Sean Jensen-Grey
0 0 0 1 1
85 Alan L
0 0 0 1 1
85 Sihao Liu
0 0 0 1 1
85 Avimitin
0 0 0 1 1
85 Mads Rumle Nordstrøm
0 0 0 1 1
85 Tushar Sondhi
0 0 0 1 1
Showing 81 to 100 of 153 results
Previous Next

Contributing Companies

Add the OSSRank badge to this project

OSSRank Badge Add this OSSRank shield to your project's README.md
[![OSSRank](https://shields.io/endpoint?url=https://ossrank.com/shield/1315)](https://ossrank.com/p/1315)