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OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank: 938
Decreased by 59
Git Repositories: chisel3
Started: 2015-04-27 3,497 days ago
Categories: Computer Architecture
GitHub Stars: 4,000 #1,972
Stackoverflow Questions with tag chisel: 694 #563
Weekly commits since inception: 2015 2019 2024

2015 2019 2024
Weekly contributors since inception: 2015 2019 2024

2015 2019 2024
Recent Project Activity: Day Span Commits Contributors

30 25 #1,269 9 #834

90 130 #1,028 19 #791

365 526 #1,160 45 #905

1095 1,429 #1,386 79 #1,257

All time 3,267 147
Contributing Individuals: Search

Commits past X days

Contributor 30 90 365 1095 All

66 chiselbot 0 0 1 1 1

82 Fabien Marteau 0 0 0 0 4

82 Wesley Terpstra 0 0 0 0 4

82 Stephen Twigg 0 0 0 0 4

82 John Ingalls 0 0 0 1 2

82 Colin Schmidt 0 0 0 0 4

82 anniej-sifive 0 0 0 0 4

82 Vladimir Milovanović 0 0 0 1 2

89 Guillaume Martres 0 0 0 1 1

89 Hongren Zheng (Zenithal) 0 0 0 1 1

89 Andrew Young 0 0 0 1 1

89 Michael Etzkorn 叶明凯 0 0 0 1 1

89 fzi-hielscher 0 0 0 1 1

89 Josh Bassett 0 0 0 0 3

89 Angie Wang 0 0 0 0 3

89 Tynan McAuley 0 0 0 1 1

89 Marco Origlia 0 0 0 1 1

89 Huang Rui 0 0 0 1 1

89 jensengrey 0 0 0 1 1

89 Sean Jensen-Grey 0 0 0 1 1

Showing 81 to 100 of 147 results

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Contributing Companies: Toggle to view table

Percentage of commits past X days

Contributing Companies 30 90 365 1095 All

SiFive 32% 63% 58% 58% 42%

University of California, Berkeley 0% 0% 0% 0% 10%

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