Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,794 commits
153 contributors

Rank

930 88

Git Repositories

Started

2015-04-27 3,694 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 20 commits #1,315 8 contributors #874
Past 90 days 179 commits #819 19 contributors #781
Past 365 days 766 commits #847 39 contributors #993
Past 1095 days 1,808 commits #1,145 79 contributors #1,242
All time 3,794 commits 153 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
118 Hongren Zheng (Zenithal)
0 0 0 0 1
118 Michael Gielda
0 0 0 0 1
118 Nick Hynes
0 0 0 0 1
118 Richard Xia
0 0 0 0 1
118 The Gitter Badger
0 0 0 0 1
118 Scott Beamer
0 0 0 0 1
118 Desire Kaleba
0 0 0 0 1
118 Nic McDonald
0 0 0 0 1
118 yep
0 0 0 0 1
118 Ruige Lee
0 0 0 0 1
118 Christopher Celio
0 0 0 0 1
118 Verneri Hirvonen
0 0 0 0 1
118 Zhuanhao Wu
0 0 0 0 1
118 Boris V.Kuznetsov
0 0 0 0 1
118 John Ingalls
0 0 0 0 1
118 fzi-hielscher
0 0 0 0 1
118 HappyQuark
0 0 0 0 1
118 Leigang Kou
0 0 0 0 1
118 chrisbaldwin2
0 0 0 0 1
118 PENGUINLIONG
0 0 0 0 1
Showing 121 to 140 of 153 results
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Contributing Companies

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