Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,754 commits
152 contributors

Rank

788 58

Git Repositories

Started

2015-04-27 3,645 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 60 commits #772 11 contributors #667
Past 90 days 383 commits #493 16 contributors #917
Past 365 days 777 commits #851 38 contributors #1,028
Past 1095 days 1,807 commits #1,174 80 contributors #1,239
All time 3,754 commits 152 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
87 Mads Rumle Nordstrøm
0 0 0 1 1
87 Tushar Sondhi
0 0 0 1 1
87 Shahzaib Kashif
0 0 0 1 1
87 qimingchu
0 0 0 1 1
87 Nandor Licker
0 0 0 1 1
87 Michiel Van Beirendonck
0 0 0 1 1
107 Hasan Genc
0 0 0 0 2
107 Oyvind Harboe
0 0 0 0 2
107 Zhehao Mao
0 0 0 0 2
107 John Ingalls
0 0 0 0 2
107 John's Brew
0 0 0 0 2
107 Hasan Genc
0 0 0 0 2
107 Brendan Sweeney
0 0 0 0 2
107 SoyaOhnishi
0 0 0 0 2
107 Jerry Zhao
0 0 0 0 2
107 Stevo
0 0 0 0 2
107 Tom Alcorn
0 0 0 0 2
118 Anders Pitman
0 0 0 0 1
118 Felix Yan
0 0 0 0 1
118 Carlos Eduardo
0 0 0 0 1
Showing 101 to 120 of 152 results
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Contributing Companies

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