OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank
939
Decreased by 61
Git Repositories
chisel3
Started
2015-04-27 3,497 days ago
GitHub Stars
4,000 #1,972
Stackoverflow Questions with tag chisel
694 #563
Weekly commits since inception
2015 2019 2024
Weekly contributors since inception
2015 2019 2024
Recent Project Activity
Day Span Commits Contributors
30 25 #1,270 9 #836
90 130 #1,028 19 #791
365 526 #1,160 45 #905
1095 1,429 #1,387 79 #1,257
All time 3,267 147
Contributing Individuals
Commits past X days
Contributor 30 90 All
89 Alan L 0 0 1
89 Sihao Liu 0 0 1
89 Avimitin 0 0 1
89 Mads Rumle Nordstrøm 0 0 1
105 Hasan Genc 0 0 2
105 Zhehao Mao 0 0 2
105 John's Brew 0 0 2
105 Hasan Genc 0 0 2
105 Brendan Sweeney 0 0 2
105 SoyaOhnishi 0 0 2
105 Jerry Zhao 0 0 2
105 Stevo 0 0 2
105 Tom Alcorn 0 0 2
114 Anders Pitman 0 0 1
114 Felix Yan 0 0 1
114 Carlos Eduardo 0 0 1
114 Michael Gielda 0 0 1
114 Nick Hynes 0 0 1
114 Richard Xia 0 0 1
114 The Gitter Badger 0 0 1
Contributing Companies

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