Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank

792 66

Git Repositories

chisel3

Started

2015-04-27 3,633 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Past 30 days 107 commits #521 9 contributors #816
Past 90 days 371 commits #507 17 contributors #883
Past 365 days 767 commits #872 40 contributors #1,000
Past 1095 days 1,785 commits #1,192 80 contributors #1,242
All time 3,722 commits 152 contributors

Contributing Individuals

Commits past X days
30 90 365 1095 All
118 Daniel Kasza 0 0 0 0 1
118 Danny 0 0 0 0 1
118 Nick 0 0 0 0 1
118 Justin Deters 0 0 0 0 1
118 Kalamár Ödön 0 0 0 0 1
118 Kevin Townsend 0 0 0 0 1
118 Sebastian Bøe 0 0 0 0 1
118 Siddhanathan Shanmugam 0 0 0 0 1
118 Steve Burns 0 0 0 0 1
118 Tynan McAuley 0 0 0 0 1
118 XinJun Ma 0 0 0 0 1
118 yep 0 0 0 0 1
Showing 141 to 152 of 152 results Previous Next
Contributing Companies

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