Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,794 commits
153 contributors

Rank

931 90

Git Repositories

Started

2015-04-27 3,695 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 20 commits #1,315 8 contributors #875
Past 90 days 179 commits #820 19 contributors #781
Past 365 days 766 commits #847 39 contributors #993
Past 1095 days 1,808 commits #1,145 79 contributors #1,242
All time 3,794 commits 153 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
118 apaj
0 0 0 0 1
118 Daniel Kasza
0 0 0 0 1
118 Danny
0 0 0 0 1
118 Nick
0 0 0 0 1
118 Justin Deters
0 0 0 0 1
118 Kalamár Ödön
0 0 0 0 1
118 Kevin Townsend
0 0 0 0 1
118 Sebastian Bøe
0 0 0 0 1
118 Siddhanathan Shanmugam
0 0 0 0 1
118 Steve Burns
0 0 0 0 1
118 Tynan McAuley
0 0 0 0 1
118 XinJun Ma
0 0 0 0 1
118 yep
0 0 0 0 1
Showing 141 to 153 of 153 results
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Contributing Companies

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