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OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank: 932
Decreased by 51
Git Repositories: chisel3
Started: 2015-04-27 3,497 days ago
Categories: Computer Architecture
GitHub Stars: 4,000 #1,973
Stackoverflow Questions with tag chisel: 694 #563
Weekly commits since inception: 2015 2019 2024

2015 2019 2024
Weekly contributors since inception: 2015 2019 2024

2015 2019 2024
Recent Project Activity: Day Span Commits Contributors

30 25 #1,264 9 #825

90 130 #1,028 19 #789

365 526 #1,159 45 #905

1095 1,429 #1,386 79 #1,257

All time 3,267 147
Contributing Individuals: Search

Commits past X days

Contributor 30 90 365 1095 All

41 Fabian Schuiki 1 1 1 3 3

41 Trevor McKay 1 1 2 2 2

43 Albert Magyar 0 0 0 0 19

44 Hideto Ueno 0 0 2 4 4

44 qimingchu 0 0 3 3 3

44 Raffaele Meloni 0 0 3 3 3

44 Hideto Ueno 0 0 3 3 3

48 Carlos Eduardo 0 0 1 4 6

48 jackkoenig 0 0 0 0 17

50 edwardcwang 0 0 0 0 13

50 colin4124 0 0 1 1 8

50 Edward Wang 0 0 0 0 13

53 Boyang Han 0 0 0 0 12

53 Girish Pai 0 0 0 4 4

53 Yinan Xu 0 0 2 2 2

56 Abongwa Bonalais 0 0 0 1 9

56 Donggyu 0 0 0 0 11

58 Kamyar Mohajerani 0 0 1 1 5

58 Martin Erhart 0 1 1 1 1

58 Jiuyang Liu 0 0 0 0 10

Showing 41 to 60 of 147 results

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Contributing Companies: Toggle to view table

Percentage of commits past X days

Contributing Companies 30 90 365 1095 All

SiFive 32% 63% 58% 58% 42%

University of California, Berkeley 0% 0% 0% 0% 10%

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