Sign up to vote

OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank: 910
Increased by 30
Git Repositories: chisel3
Started: 2015-04-27 3,305 days ago
Categories: Computer Architecture
GitHub Stars: 3,729 #1,983
Stackoverflow Questions with tag chisel: 691 #561
Weekly commits since inception: 2015 2019 2024

2015 2019 2024
Weekly contributors since inception: 2015 2019 2024

2015 2019 2024
Recent Project Activity: Day Span Commits Contributors

30 33 #1,189 12 #674

90 122 #1,148 21 #775

365 505 #1,230 48 #909

1095 1,318 #1,517 79 #1,275

All time 2,999 138
Contributing Individuals: Search

Commits past X days

Contributor 30 90 365 1095 All

21 Albert Chen 0 0 8 11 15

22 Andrew Lenharth 0 0 9 9 9

22 Daniel Resnick 0 0 8 10 10

24 Kevin Laeufer 0 0 0 16 18

25 Aditya Naik 0 0 8 8 8

26 Henry Cook
SiFive
0 0 0 0 45

27 Martin Schoeberl 0 0 3 8 18

28 Ocean Shen 1 3 3 5 5

29 Andrew Waterman 0 0 0 0 38

30 Zachary Yedidia 0 0 0 10 10

30 Palmer Dabbelt 0 0 0 0 30

30 Hideto Ueno 0 3 3 3 3

30 jackbackrack 0 0 0 0 30

34 Andrew Lenharth 0 0 3 6 6

34 Schuyler Eldridge 0 0 0 0 27

34 Abongwa Bonalais 0 0 0 9 9

37 Boyang Han 0 0 0 7 12

38 Raffaele Meloni 1 2 2 2 2

39 Paul Rigge 0 0 0 0 23

40 Tynan McAuley 0 1 2 3 3

Showing 21 to 40 of 138 results

Previous Next
Contributing Companies: Toggle to view table

Percentage of commits past X days

Contributing Companies 30 90 365 1095 All

SiFive 45% 52% 49% 53% 40%

University of California, Berkeley 0% 0% 0% 0% 11%

Add this OSSRank shield to this project's README.md

[![OSSRank](https://shields.io/endpoint?url=https://ossrank.com/shield/1315)](https://ossrank.com/p/1315)