Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,794 commits
153 contributors

Rank

927 120

Git Repositories

Started

2015-04-27 3,691 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 20 commits #1,341 8 contributors #876
Past 90 days 187 commits #800 19 contributors #768
Past 365 days 773 commits #841 40 contributors #976
Past 1095 days 1,814 commits #1,148 79 contributors #1,242
All time 3,794 commits 153 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
21 Mike Urbach
0 0 0 21 21
22 Tynan McAuley
0 3 6 9 9
22 George
0 0 0 19 19
24 Kamyar Mohajerani
3 3 3 4 8
25 qimingchu
0 0 8 9 9
25 Albert Chen
0 0 0 17 17
27 Martin Schoeberl
0 1 3 7 21
28 Henry Cook SiFive
0 0 0 0 45
29 Fabian Schuiki
0 0 6 8 8
30 Andrew Waterman
0 0 0 0 38
31 Albert Chen
0 0 0 11 15
32 Amelia Dobis
0 0 4 7 7
33 Zachary Yedidia
0 0 0 10 10
33 Daniel Resnick
0 0 0 10 10
33 Palmer Dabbelt
0 0 0 0 30
33 jackbackrack
0 0 0 0 30
37 Kevin Laeufer
0 0 0 5 18
37 edwardcwang
1 1 1 1 14
39 Schuyler Eldridge
0 0 0 0 27
39 Andrew Lenharth
0 0 0 9 9
Showing 21 to 40 of 153 results
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Contributing Companies

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