Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,822 commits
153 contributors

Rank

1024 36

Git Repositories

Started

2015-04-27 3,730 days ago

GitHub Stars

4,156 #1,970

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 22 commits #1,257 7 contributors #939
Past 90 days 71 commits #1,325 15 contributors #922
Past 365 days 743 commits #867 36 contributors #1,054
Past 1095 days 1,811 commits #1,140 77 contributors #1,255
All time 3,822 commits 153 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
1 Schuyler Eldridge SiFive
3 11 356 609 645
2 Jack Koenig SiFive
7 19 170 495 793
3 Chisel Bot
7 16 60 89 89
4 Jim Lawson University of California, Berkeley
0 0 0 0 319
5 Jiuyang Liu
0 0 6 56 140
6 Andrew Waterman SiFive
0 0 0 2 259
7 Aditya Naik
2 4 21 45 53
8 Ducky
0 0 0 0 199
9 Megan Wachs
0 0 2 49 76
10 Schuyler Eldridge
0 0 0 0 168
11 Will Dietz SiFive
0 0 10 42 42
12 Chick Markley
0 0 0 22 110
13 Adam Izraelevitz
1 1 3 24 80
14 Aditya Naik
0 0 19 27 27
15 unlsycn
0 2 20 20 20
16 Trevor McKay
0 5 16 16 16
17 Deborah Soung
0 1 5 26 33
18 Jared Barocsi
0 0 0 26 32
18 Sprite
0 0 5 23 23
20 Mike Urbach
0 0 4 20 20
Showing 1 to 20 of 153 results
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Contributing Companies

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