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OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank
925
Decreased by 12
Git Repositories
chisel3
Started
2015-04-27 3,290 days ago
Categories
Computer Architecture
GitHub Stars
3,695 #1,983
Stackoverflow Questions with tag chisel
691 #561
Weekly commits since inception
2015 2019 2024
Weekly contributors since inception
2015 2019 2024
Recent Project Activity
Day Span Commits Contributors
30 33 #1,177 12 #663
90 117 #1,119 19 #815
365 508 #1,240 47 #938
1095 1,316 #1,523 77 #1,309
All time 2,981 136
Contributing Individuals
Commits past X days
Contributor 30 90 All
1 Jack Koenig
SiFive
12 36 571
2 Schuyler Eldridge
SiFive
1 17 286
3 Jiuyang Liu 5 9 132
4 Jim Lawson
University of California, Berkeley
0 0 319
5 Andrew Waterman
SiFive
0 0 259
6 Megan Wachs 0 0 66
7 Will Dietz
SiFive
4 9 25
8 Ducky 0 0 199
9 Chisel Bot 2 8 26
10 Chick Markley 0 0 110
11 Schuyler Eldridge 0 0 168
12 Adam Izraelevitz 0 0 77
13 Deborah Soung 1 5 27
14 Mike Urbach 3 9 15
15 Jared Barocsi 0 0 32
16 Sprite 1 8 15
17 Mike Urbach 0 0 21
18 Aditya Naik 0 0 32
19 Albert Chen 0 0 17
20 George 0 0 19
Contributing Companies

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