Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,802 commits
153 contributors

Rank

1009 136

Git Repositories

Started

2015-04-27 3,710 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 17 commits #1,378 6 contributors #1,041
Past 90 days 105 commits #1,096 18 contributors #784
Past 365 days 759 commits #851 38 contributors #1,012
Past 1095 days 1,803 commits #1,143 78 contributors #1,246
All time 3,802 commits 153 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
1 Schuyler Eldridge SiFive
4 30 353 606 642
2 Jack Koenig SiFive
4 21 188 490 787
3 Chisel Bot
3 14 54 83 83
4 Jim Lawson University of California, Berkeley
0 0 0 0 319
5 Jiuyang Liu
0 0 7 56 140
6 Andrew Waterman SiFive
0 0 0 2 259
7 Aditya Naik
0 3 19 44 51
8 Megan Wachs
0 0 5 55 76
9 Ducky
0 0 0 0 199
10 Aditya Naik
0 8 19 27 27
11 Schuyler Eldridge
0 0 0 0 168
12 Will Dietz SiFive
0 0 10 42 42
12 Trevor McKay
4 10 16 16 16
14 Chick Markley
0 0 0 22 110
15 Adam Izraelevitz
0 0 2 23 79
16 unlsycn
0 2 20 20 20
17 Deborah Soung
0 1 5 26 33
18 Jared Barocsi
0 0 0 27 32
19 Sprite
0 0 5 23 23
20 Mike Urbach
0 0 4 20 20
Showing 1 to 20 of 153 results
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Contributing Companies

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