Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,793 commits
152 contributors

Rank

963 160

Git Repositories

Started

2015-04-27 3,689 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 20 commits #1,314 7 contributors #949
Past 90 days 192 commits #792 18 contributors #816
Past 365 days 773 commits #846 39 contributors #997
Past 1095 days 1,813 commits #1,147 78 contributors #1,251
All time 3,793 commits 152 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
1 Schuyler Eldridge SiFive
7 91 356 606 642
2 Jack Koenig SiFive
3 49 199 498 784
3 Chisel Bot
4 14 53 81 81
4 Jim Lawson University of California, Berkeley
0 0 0 0 319
5 Jiuyang Liu
0 0 8 56 140
6 Andrew Waterman SiFive
0 0 0 2 259
7 Aditya Naik
0 3 19 44 51
8 Megan Wachs
0 0 5 55 76
9 Ducky
0 0 0 0 199
10 Aditya Naik
0 8 19 27 27
11 Schuyler Eldridge
0 0 0 0 168
12 Will Dietz SiFive
0 0 10 42 42
13 Chick Markley
0 0 0 22 110
14 Adam Izraelevitz
0 0 2 25 79
15 unlsycn
0 2 20 20 20
16 Trevor McKay
1 9 13 13 13
17 Deborah Soung
0 1 5 26 33
18 Jared Barocsi
0 0 0 28 32
19 Sprite
0 0 5 23 23
20 Mike Urbach
0 0 4 20 20
Showing 1 to 20 of 152 results
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Contributing Companies

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