OSS Project

RISC-V

An open standard instruction set architecture (ISA) based on established RISC principles

Rank
237
Decreased by 45
Started
2006-06-02 6,752 days ago
Open Core Products
Open Core Company Product
efabless efabless
SiFive SiFive Core IP
Tenstorrent Grayskull
Ventana Micro Systems Ventana
GitHub Stars
7,886 #1,432
Stackoverflow Questions with tag riscv
1,411 #440
Weekly commits since inception
2006 2015 2024
Weekly contributors since inception
2006 2015 2024
Recent Project Activity
Day Span Commits Contributors
30 65 #719 25 #292
90 301 #562 56 #254
365 1,987 #397 192 #195
1095 7,063 #377 436 #216
All time 25,198 1,195
Contributing Individuals
Commits past X days
Contributor 30 90 All
786 Cornelius Diekmann 0 0 1
786 Dan Robertson 0 0 1
786 Daniel Kucera 0 0 1
786 Georg Sauthoff 0 0 1
786 Hsiangkai Wang 0 0 1
786 Icenowy Zheng 0 0 1
786 Jacob Rosenthal 0 0 1
786 Jake Merdich 0 0 1
786 Jan Dakinevich 0 0 1
786 Joshua Wise 0 0 1
786 Jussi Kivilinna 0 0 1
786 Linus Walleij 0 0 1
786 Luc Maranget 0 0 1
786 Lucas 0 0 1
786 Mara Bos 0 0 1
786 Marc Reilly 0 0 1
786 Mark Vels 0 0 1
786 Marti Bolivar 0 0 1
786 Masaki Muranaka 0 0 1
786 Matt Reimer 0 0 1
Contributing Companies

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