OSS Project

RISC-V

An open standard instruction set architecture (ISA) based on established RISC principles

Rank
232
Decreased by 33
Started
2006-06-02 6,752 days ago
Open Core Products
Open Core Company Product
efabless efabless
SiFive SiFive Core IP
Tenstorrent Grayskull
Ventana Micro Systems Ventana
GitHub Stars
7,861 #1,435
Stackoverflow Questions with tag riscv
1,411 #440
Weekly commits since inception
2006 2015 2024
Weekly contributors since inception
2006 2015 2024
Recent Project Activity
Day Span Commits Contributors
30 68 #681 25 #289
90 299 #571 56 #254
365 1,999 #395 192 #195
1095 7,060 #376 436 #216
All time 25,195 1,195
Contributing Individuals
Commits past X days
Contributor 30 90 All
680 Yegor Yefremov 0 0 2
680 ksyx 0 0 2
680 Andreas Sandberg 0 0 2
680 Karl Palsson 0 0 2
680 Alexandru Gagniuc 0 0 2
680 Christoph Muellner 0 0 2
680 Gokturk Yuksek 0 0 2
680 Jens Hoffmann 0 0 2
680 Anton Kolesov 0 0 2
680 Raúl Sánchez Siles 0 0 2
680 Roman D 0 0 2
680 Kevin Mills 0 0 2
680 Jaehoon Park 0 0 2
680 benscotstaveley 0 0 2
680 leahyao 0 0 2
680 Adam Bass 0 0 2
680 Ali Lown 0 0 2
680 Alex Ray 0 0 2
680 Andreas Bießmann 0 0 2
680 asier70 0 0 2
Contributing Companies

Add this OSSRank shield to this project's README.md

[![OSSRank](https://shields.io/endpoint?url=https://ossrank.com/shield/1311)](https://ossrank.com/p/1311)