RISC-V

An open standard instruction set architecture (ISA) based on established RISC principles

Rank

187 20

Started

2006-06-02 6,892 days ago

Open Core Products

efabless efabless
SiFive Core IP SiFive
Grayskull Tenstorrent

GitHub Stars

8,179 #1,437

Weekly commits since inception

2006 2015 2025

Weekly contributors since inception

2006 2015 2025

Recent Project Activity

Past 30 days 141 commits #407 31 contributors #250
Past 90 days 344 commits #536 63 contributors #230
Past 365 days 1,666 commits #460 192 contributors #197
Past 1095 days 6,981 commits #378 454 contributors #201
All time 25,855 commits 1,245 contributors

Contributing Individuals

Commits past X days
30 90 365 1095 All
59 Jan Matyas 0 0 0 21 63
62 Mark Zhuang 0 0 11 23 23
62 Jeff Scheel 0 0 0 28 46
64 guan jian 1 2 14 14 14
65 Farid Khaydari 1 3 13 13 13
66 kc8apf 0 0 0 0 94
66 jhauser-us 0 0 0 5 84
68 Andreas Faerber 0 0 0 0 91
68 Menon, Nishanth 0 0 1 24 40
70 smatherd 6 6 6 6 6
70 Ian Thompson 0 0 2 28 28
72 Kevin-Andes 0 0 0 1 83
72 Kumar Sankaran 0 0 0 2 81
74 Prashanth Mundkur 2 7 7 7 7
74 Beeman Strong 0 2 12 12 12
74 mifi 0 0 0 0 80
77 Marek Vrbka 0 0 1 25 25
78 Palmer Dabbelt 0 0 0 4 68
79 KotorinMinami 1 4 9 9 9
80 Tsukasa OI 0 0 0 20 33
Showing 61 to 80 of 1245 results Previous Next
Contributing Companies

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