RISC-V

An open standard instruction set architecture (ISA) based on established RISC principles

Computer Architecture
efabless
SiFive
Tenstorrent
Ventana Micro Systems
started in 2006
25,885 commits
1,248 contributors

Rank

187 27

Started

2006-06-02 6,902 days ago

Open Core Products

efabless efabless
SiFive Core IP SiFive
Grayskull Tenstorrent
Ventana Ventana Micro Systems

GitHub Stars

8,179 #1,437

Weekly commits since inception
2006 2015 2025

Weekly contributors since inception
2006 2015 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 126 commits #416 30 contributors #243
Past 90 days 343 commits #532 62 contributors #233
Past 365 days 1,638 commits #461 189 contributors #200
Past 1095 days 6,972 commits #377 453 contributors #201
All time 25,885 commits 1,248 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
542 Ahmed Boughanmi
0 0 0 1 1
542 Brandon Pupp
0 0 0 1 1
542 Fedi Bouzazi
0 0 0 1 1
542 Jason Peck
0 0 0 1 1
542 Luca Hung
0 0 0 1 1
542 Gabriele Tripi
0 0 0 1 1
542 Nikola Lukić
0 0 0 1 1
542 xyq1113723547
0 0 0 1 1
542 saahm
0 0 0 1 1
542 Roy Franz
0 0 0 1 1
542 David Vidrie Leon
0 0 0 1 1
542 Samuel Dewan
0 0 0 1 1
542 mylai-mtk
0 0 0 1 1
542 akshaykumars614
0 0 0 1 1
542 splinedrive
0 0 0 1 1
542 OccupyMars2025
0 0 0 1 1
542 Yaksis
0 0 0 1 1
542 NaOHCC
0 0 0 1 1
542 Piotr Wegrzyn
0 0 0 1 1
542 Lucas
0 0 0 1 1
Showing 681 to 700 of 1248 results
Previous Next

Contributing Companies

Add the OSSRank badge to this project

OSSRank Badge Add this OSSRank shield to your project's README.md
[![OSSRank](https://shields.io/endpoint?url=https://ossrank.com/shield/1311)](https://ossrank.com/p/1311)