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OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank: 934
Decreased by 52
Git Repositories: chisel3
Started: 2015-04-27 3,497 days ago
Categories: Computer Architecture
GitHub Stars: 4,000 #1,972
Stackoverflow Questions with tag chisel: 694 #563
Weekly commits since inception: 2015 2019 2024

2015 2019 2024
Weekly contributors since inception: 2015 2019 2024

2015 2019 2024
Recent Project Activity: Day Span Commits Contributors

30 25 #1,265 9 #828

90 130 #1,027 19 #791

365 526 #1,159 45 #904

1095 1,429 #1,386 79 #1,257

All time 3,267 147
Contributing Individuals: Search

Commits past X days

Contributor 30 90 365 1095 All

58 Alex Swehla 0 1 1 1 1

58 unlsycn 0 1 1 1 1

58 SYYANI 0 1 1 1 1

64 Jared Barocsi 0 0 0 3 3

65 Olushola Ogunkelu 0 0 0 2 4

66 Jerry Zhao 0 0 1 1 1

66 Ashe Connor 0 0 1 1 1

66 Gon Solo 0 0 0 2 2

66 Oyvind Harboe 0 0 0 2 2

66 Nandor Licker 0 0 1 1 1

66 Lucheng Zhang 0 0 0 2 2

66 Liu Xiaoyi 0 0 0 2 2

66 Henry Cook 0 0 0 0 6

66 Palmer Dabbelt 0 0 0 0 6

66 Tushar Sondhi 0 0 1 1 1

66 Shahzaib Kashif 0 0 1 1 1

66 qimingchu 0 0 1 1 1

66 Nandor Licker 0 0 1 1 1

66 Michiel Van Beirendonck 0 0 1 1 1

66 Amelia Dobis 0 0 1 1 1

Showing 61 to 80 of 147 results

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Contributing Companies: Toggle to view table

Percentage of commits past X days

Contributing Companies 30 90 365 1095 All

SiFive 32% 63% 58% 58% 42%

University of California, Berkeley 0% 0% 0% 0% 10%

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