Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,772 commits
152 contributors

Rank

762 55

Git Repositories

Started

2015-04-27 3,657 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 61 commits #766 13 contributors #577
Past 90 days 378 commits #497 18 contributors #833
Past 365 days 785 commits #841 37 contributors #1,042
Past 1095 days 1,816 commits #1,163 79 contributors #1,253
All time 3,772 commits 152 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
1 Schuyler Eldridge SiFive
13 256 349 599 635
2 Jack Koenig SiFive
15 65 209 509 781
3 Chisel Bot
6 14 49 76 76
4 Jim Lawson University of California, Berkeley
0 0 0 0 319
5 Jiuyang Liu
0 0 8 59 140
6 Andrew Waterman SiFive
0 0 0 2 259
7 Aditya Naik
3 5 19 44 51
8 Megan Wachs
0 1 9 56 76
9 Aditya Naik
8 9 19 27 27
10 Ducky
0 0 0 0 199
11 Will Dietz SiFive
0 0 17 42 42
12 Schuyler Eldridge
0 0 0 0 168
13 Chick Markley
0 0 0 22 110
14 unlsycn
2 5 20 20 20
15 Trevor McKay
6 9 12 12 12
16 Adam Izraelevitz
0 0 2 25 79
17 Deborah Soung
1 1 6 27 33
18 Jared Barocsi
0 0 0 29 32
18 Sprite
0 0 7 23 23
20 Tynan McAuley
3 3 6 9 9
Showing 1 to 20 of 152 results
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Contributing Companies

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