Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank

796 39

Git Repositories

chisel3

Started

2015-04-27 3,629 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Past 30 days 114 commits #513 9 contributors #825
Past 90 days 367 commits #507 17 contributors #886
Past 365 days 761 commits #883 40 contributors #999
Past 1095 days 1,784 commits #1,193 80 contributors #1,244
All time 3,714 commits 152 contributors

Contributing Individuals

Commits past X days
30 90 365 1095 All
21 Mike Urbach 0 0 0 21 21
22 Fabian Schuiki 0 5 6 8 8
23 Trevor McKay 2 3 6 6 6
24 George 0 0 0 19 19
25 Albert Chen 0 0 0 17 17
26 Tynan McAuley 1 2 4 7 7
27 Henry Cook
SiFive
0 0 0 0 45
28 Amelia Dobis 0 0 7 7 7
29 Martin Schoeberl 0 0 2 7 20
30 Andrew Waterman 0 0 0 0 38
31 Albert Chen 0 0 0 11 15
32 Kevin Laeufer 0 0 0 8 18
33 Daniel Resnick 0 0 0 10 10
33 Zachary Yedidia 0 0 0 10 10
33 jackbackrack 0 0 0 0 30
33 Palmer Dabbelt 0 0 0 0 30
37 Schuyler Eldridge 0 0 0 0 27
37 Andrew Lenharth 0 0 0 9 9
39 Paul Rigge 0 0 0 0 23
40 Jason Wang 0 2 2 2 2
Showing 21 to 40 of 152 results Previous Next
Contributing Companies

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