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OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank: 933
Decreased by 70
Git Repositories: chisel3
Started: 2015-04-27 3,496 days ago
Categories: Computer Architecture
GitHub Stars: 4,000 #1,974
Stackoverflow Questions with tag chisel: 694 #563
Weekly commits since inception: 2015 2019 2024

2015 2019 2024
Weekly contributors since inception: 2015 2019 2024

2015 2019 2024
Recent Project Activity: Day Span Commits Contributors

30 25 #1,267 9 #826

90 130 #1,027 19 #790

365 526 #1,159 45 #906

1095 1,430 #1,386 79 #1,258

All time 3,267 147
Contributing Individuals: Search

Commits past X days

Contributor 30 90 365 1095 All

21 Andrew Lenharth 0 0 9 9 9

22 Albert Chen 0 0 0 17 17

23 Henry Cook
SiFive
0 0 0 0 45

24 Martin Schoeberl 0 0 4 6 19

25 Amelia Dobis 0 0 7 7 7

26 Andrew Waterman 0 0 0 0 38

27 Albert Chen 0 0 0 11 15

28 Michael Maloney 2 2 3 3 3

28 Kevin Laeufer 0 0 0 9 18

30 Zachary Yedidia 0 0 0 10 10

30 Palmer Dabbelt 0 0 0 0 30

30 jackbackrack 0 0 0 0 30

30 Daniel Resnick 0 0 0 10 10

34 Tynan McAuley 0 0 4 5 5

34 Andrew Lenharth 0 0 3 6 6

34 Schuyler Eldridge 0 0 0 0 27

34 Robert Young 1 1 2 4 4

38 Aditya Naik 0 0 0 8 8

38 Ocean Shen 0 0 3 5 5

40 Paul Rigge 0 0 0 0 23

Showing 21 to 40 of 147 results

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Contributing Companies: Toggle to view table

Percentage of commits past X days

Contributing Companies 30 90 365 1095 All

SiFive 32% 63% 58% 58% 42%

University of California, Berkeley 0% 0% 0% 0% 10%

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