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OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank: 964
Decreased by 28
Git Repositories: chisel3
Started: 2015-04-27 3,310 days ago
Categories: Computer Architecture
GitHub Stars: 3,750 #1,979
Stackoverflow Questions with tag chisel: 691 #561
Weekly commits since inception: 2015 2019 2024

2015 2019 2024
Weekly contributors since inception: 2015 2019 2024

2015 2019 2024
Recent Project Activity: Day Span Commits Contributors

30 24 #1,346 10 #787

90 114 #1,193 21 #775

365 503 #1,230 48 #911

1095 1,315 #1,517 79 #1,271

All time 3,001 138
Contributing Individuals: Search

Commits past X days

Contributor 30 90 365 1095 All

21 Albert Chen 0 0 8 11 15

22 Andrew Lenharth 0 0 9 9 9

22 Daniel Resnick 0 0 8 10 10

24 Kevin Laeufer 0 0 0 16 18

25 Aditya Naik 0 0 8 8 8

26 Henry Cook
SiFive
0 0 0 0 45

27 Martin Schoeberl 0 0 3 7 18

28 Andrew Waterman 0 0 0 0 38

29 Ocean Shen 0 3 3 5 5

30 Zachary Yedidia 0 0 0 10 10

30 Palmer Dabbelt 0 0 0 0 30

30 jackbackrack 0 0 0 0 30

30 Amelia Dobis 2 2 2 2 2

30 Hideto Ueno 0 3 3 3 3

35 Abongwa Bonalais 0 0 0 9 9

35 Andrew Lenharth 0 0 3 6 6

35 Schuyler Eldridge 0 0 0 0 27

38 Boyang Han 0 0 0 7 12

39 Paul Rigge 0 0 0 0 23

40 Raffaele Meloni 0 2 2 2 2

Showing 21 to 40 of 138 results

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Contributing Companies: Toggle to view table

Percentage of commits past X days

Contributing Companies 30 90 365 1095 All

SiFive 42% 49% 49% 53% 40%

University of California, Berkeley 0% 0% 0% 0% 11%

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