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OSS Project

Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Rank: 939
Decreased by 60
Git Repositories: chisel3
Started: 2015-04-27 3,498 days ago
Categories: Computer Architecture
GitHub Stars: 4,000 #1,972
Stackoverflow Questions with tag chisel: 694 #563
Weekly commits since inception: 2015 2019 2024

2015 2019 2024
Weekly contributors since inception: 2015 2019 2024

2015 2019 2024
Recent Project Activity: Day Span Commits Contributors

30 25 #1,270 9 #834

90 130 #1,028 19 #790

365 526 #1,160 45 #906

1095 1,429 #1,387 79 #1,257

All time 3,267 147
Contributing Individuals: Search

Commits past X days

Contributor 30 90 365 1095 All

114 Kalamár Ödön 0 0 0 0 1

114 Kevin Townsend 0 0 0 0 1

114 Sebastian Bøe 0 0 0 0 1

114 Siddhanathan Shanmugam 0 0 0 0 1

114 Steve Burns 0 0 0 0 1

114 XinJun Ma 0 0 0 0 1

114 yep 0 0 0 0 1

Showing 141 to 147 of 147 results

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Contributing Companies: Toggle to view table

Percentage of commits past X days

Contributing Companies 30 90 365 1095 All

SiFive 32% 63% 58% 58% 42%

University of California, Berkeley 0% 0% 0% 0% 10%

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