Chisel

An open-source hardware description language (HDL) used to describe digital electronics and circuits at the register-transfer level that facilitates advanced circuit generation and design reuse for both ASIC and FPGA digital logic designs

Computer Architecture
started in 2015
3,772 commits
152 contributors

Rank

762 55

Git Repositories

Started

2015-04-27 3,657 days ago

GitHub Stars

4,156 #1,972

Weekly commits since inception
2015 2020 2025

Weekly contributors since inception
2015 2020 2025

Recent Project Activity

Time Period Commits Contributors
Past 30 days 61 commits #766 13 contributors #577
Past 90 days 378 commits #497 18 contributors #833
Past 365 days 785 commits #841 37 contributors #1,042
Past 1095 days 1,816 commits #1,163 79 contributors #1,253
All time 3,772 commits 152 contributors

Contributing Individuals

Contributor 30 days 90 days 365 days 1095 days All time
118 Daniel Kasza
0 0 0 0 1
118 Danny
0 0 0 0 1
118 Nick
0 0 0 0 1
118 Justin Deters
0 0 0 0 1
118 Kalamár Ödön
0 0 0 0 1
118 Kevin Townsend
0 0 0 0 1
118 Sebastian Bøe
0 0 0 0 1
118 Siddhanathan Shanmugam
0 0 0 0 1
118 Steve Burns
0 0 0 0 1
118 Tynan McAuley
0 0 0 0 1
118 XinJun Ma
0 0 0 0 1
118 yep
0 0 0 0 1
Showing 141 to 152 of 152 results
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Contributing Companies

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